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DELD Unit Wise Question Bank(IMPORTANT NOV-2019)-SPPU

Unit wise Question Bank (A.Y. 2019-20, Semester I) Subject: Digital Electronics and Logic Design

Unit No.– I 
Name of Unit: Combinational LogicDesign
  

1 Explain half and full adder with its logical diagram. 

2 Explain half and full subtractor with its logical diagram 

3 Explain 4bit binary adder with digram 

4 Explain 1bit ,2bit and 4bit compartor. 

5 Explain look ahead carry generator in detail. 

6 Explain binary to grey code converter. 

7 Explain BCD to Excess 3 code converter. 

8 Implement full adder and full subtractor using MUX and DEMUX 

9 Explain parity generator and checker. 

10 Implement following Boolean expression using 4:1 MUX and logical gates F(A,B,C,D) =∑(0,1,5,9,10,15). 

11) Solve the following using KMAP technique 

a) F (A,B,C,D) = ∑m (0,2,4,7,11,13,15) 

b) F (A,B,C,D) = ∑m (1,3,7,11,15)+ d (0,2,5) 

c) F (A,B,C,D) = ∏ M( 0,1,6,7,8,9).d(2,3) 

12 RedReduce the following function using K map technique. a. F(A,B,C,D)=π M (0,2,3,8,9,12,13,15) 

13 Simplify Following logic function using Quine McCluskey minimization Technique.Y(A,B,C,D)=∑m(0,1,3,7,8,9,11,15) 

14 Design and implement BCD adder using IC 7483. 

15 what do you mean by Parity? How does IC 74180 work? Design 9 bit even parity generator Using the same.

Unit No.– II 
Nameof Unit: Sequential Logic Design 

1 What is difference between Combinational and Sequential Circuit. 

2 Compare Moore and Mealy Model? 

3 Convert the following Flipflop. JK to T ii) SR to D iii) SR to JK iv) JK to SR 

4 Explain MasterSlave JK Flipflop. 

5 Design MOD4 synchronous Counter using JKFF. 

6 Design & Implement 3Bit Updown Synchronous Counter using JKFF. 

7 Comparison between Synchronous & Asynchronous Counter. 

8 Write Short notes on Ring and Johnson Counter. 9 Design binary Sequence generator to generate binary sequence ‘11010’ using JKFF. 

10 Design a Sequence detector to detect given sequence …110… using DFF. 

11 What do you mean by Master-Slave JK Flip-flop? Explain the advantage of this Flipflop. Draw Suitable circuit diagram. 

12 Convert SR Flip Flop to T Flip Flop 

13 Explain with neat diagram working of serial in serial out 4 bit shift register. Draw necessary timing diagram. 

14 What is the difference between Combinational & Sequential Circuit 

15 Design Mod 24 counter using 7490.

Unit No. III 
Name of Unit: Algorithmic State Machines 

1 What is ASM? State & explain basic component of ASM Chart. Features of ASM. 

2 Draw an ASM Chart & state table of a 2bit up down counter having a mode control i/p. i. If C = 1 Then changes from 000 010 100 110 000 & Repeats ii. If C = 0 Then circuit holds the present state. 

3. A sequential circuit has to count DOWN from ‘111’ to ‘000’. The circuit also has input ‘X’. If X = 0 then the circuit will count DOWN and if X = 1 then they will remain in current state. Draw an ASM Chart and state table for this circuit and design the circuit to generate the output using MUX Controller method. 

4 Design binary Sequence generator to generate binary sequence ‘11010’ using JKFF. 

5 Design a Sequence detector to detect given sequence …110… using DFF. 

6 What is VHDL? Features of VHDL and its advantages. 

7 State the VHDL Program format & entity format. Explain the entity declaration for basic logic gate and Universal gates. 

8 Explain the entity architecture declaration for 2bit AND, OR, NOR gate. 

9 Describe the different Modelling Styles of VHDL with suitable examples. 

10 Compare concurrent and Sequential statement in VHDL 

11 What is VHDL? Explain entity-architecture declaration for AND gate. 

12 Write VHDL code for Ripple counter using suitable modeling style. 

13 Draw ASM chart and design circuit using T FF for given sequence 1-2-4-6-1


Unit No. IV 
Name of Unit :Programmable Logic Device 


1 What is PLD? Mention use & types of PLD. Also list out its advantages? 

2 Draw & Explain general structure of PLA. 

3 What is PLA? Explain the input buffer AND & OR matrix in PLA. 

4 Explain in brief design model of PLA for any code conversion example. 

5 Draw & Explain general structure of PAL. 

7 Design BCD to Excess3 converter and Implement it using PAL. 

8 Implement 4:1 Multiplexer using suitable PAL. 

9 Compare between PLA & PAL. 

10 State two advantages of PLD over fixed function IC and application specific IC 

11 Implement the Following function using PLA F1=∑ m (0, 3, 4, 7) F2=∑ m (1, 2, 5, 7)


Unit No. V 
Name of Unit:-Logic Families 


1 State and explain any four characteristics of digital ICs. 

2 Explain operation of two inputs TTL NAND gates. 

3 Explain standard TTL characteristics in detail. 

4 What is tri-state, use of tri-state buffers? 

5 Draw and explain tri-state TTL inverter. 

6 What is high impedance state and where it is used. 

7 Draw the structure of CMOS inverter gate. Explain its working. 

8 Explain operation of two input CMOS NAND gates. 

9 List the difference between CMOS and TTL 

10 Draw and explain TTL driving CMOS gate. 

11 Draw two inputs TTL NAND gate circuit with totem Pole configuration and explain its operation. 

12 Why Wired Logic is not possible in CMOS Operation.


Unit No. VI 
Name ofUnit:-Microcontrollers 

1 Explain the features of 8051 Microcontroller 

2 What is Microcontroller? Comparison of Microprocessor and Microcontroller. 

3 List advantages, disadvantages and application of Microcontroller. 

4 Draw and explain 8051 Microcontroller pin diagram? 

5 Draw & Explain 8051 Microcontroller architecture. 

6 Draw & Explain program status word (PSW)? Describe its format. 

7 Draw the memory map of 8051 Microcontroller. 

8 Draw & explain the bit addressable internal RAM area of 8051 Microcontroller. 

9 Explain special function registers in 8051 Microcontroller. 

10 Explain interrupt structure of 8051 Microcontroller 

11 Give Significance of Following pins in 8051 i)PSEN# (ii)ALE (iii)TxD (iv) INTO# 

12 What is Addressing Mode? Identify & Justify addressing modes of the following 8051 instructions. 

   ADD A,#10 

   MOVX A, @DPTR

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